⚡ The team is building its own FPGA accelerator from scratch to run LLM and speech models. There's already a first PoC, the next 6–8 months are dedicated to MVP development, and there's a first client.

We're looking for a strong low-level / systems engineer who can work at the intersection of software and hardware.

Critical:

• Strong C/C++ or Rust
• Deep practical experience with FPGAs
• Device drivers / FPGA runtimes
• KMD / UMD, low-level APIs
• PCIe, DMA, memory management, synchronization
• Asynchronous / concurrent low-latency systems

Experience with Xilinx XDMA / QDMA drivers is of particular interest.

Experience with AI/ML and LLM will be a plus, but is not mandatory.

Conditions:

• Remote from any country
• Currently part-time ~20 hours per week
• Potential transition to full-time after MVP
• Very early stage — opportunity to directly influence product architecture

For details, please write to direct messages or Telegram: GreatSuvorova